bsp_STM32F407DEV.h 29 KB

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  1. /**
  2. ******************************************************************************
  3. * @file bsp.h
  4. * @author
  5. * @version V0.1.0
  6. * @date 21-July-2017
  7. * @brief This file contains definitions for ANCHOR hardware resources.
  8. ******************************************************************************
  9. *
  10. *
  11. *
  12. *
  13. ******************************************************************************
  14. */
  15. /* Define to prevent recursive inclusion -------------------------------------*/
  16. #ifndef __BSP_STM32F407DEV_H
  17. #define __BSP_STM32F407DEV_H
  18. #ifdef __cplusplus
  19. extern "C" {
  20. #endif
  21. /* Includes ------------------------------------------------------------------*/
  22. #include "stm32f4xx.h"
  23. #include "stm32f4xx_hal.h"
  24. /*############################### GPIO #######################################*/
  25. #if defined(HAL_GPIO_MODULE_ENABLED)
  26. /** LED **/
  27. #define LED_UWB_PIN GPIO_PIN_10
  28. #define LED_UWB_GPIO_PORT GPIOA
  29. #define LED_UWB_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
  30. #define LED_UWB_GPIO_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
  31. #define LED_COM_PIN GPIO_PIN_9
  32. #define LED_COM_GPIO_PORT GPIOA
  33. #define LED_COM_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
  34. #define LED_COM_GPIO_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
  35. #define LED_BAT_PIN GPIO_PIN_8
  36. #define LED_BAT_GPIO_PORT GPIOA
  37. #define LED_BAT_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
  38. #define LED_BAT_GPIO_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
  39. #define LED_RUN_PIN GPIO_PIN_9
  40. #define LED_RUN_GPIO_PORT GPIOC
  41. #define LED_RUN_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
  42. #define LED_RUN_GPIO_CLK_DISABLE() __HAL_RCC_GPIOC_CLK_DISABLE()
  43. /** BUTTON **/
  44. #define KEY1_BUTTON_PIN GPIO_PIN_8
  45. #define KEY1_BUTTON_GPIO_PORT GPIOB
  46. #define KEY1_BUTTON_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
  47. #define KEY1_BUTTON_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
  48. #define KEY1_BUTTON_EXTI_IRQn EXTI9_5_IRQn
  49. #define KEY1_BUTTON_EXTI_IRQn_PRIORITY 0
  50. #define KEY2_BUTTON_PIN GPIO_PIN_9
  51. #define KEY2_BUTTON_GPIO_PORT GPIOB
  52. #define KEY2_BUTTON_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
  53. #define KEY2_BUTTON_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
  54. #define KEY2_BUTTON_EXTI_IRQn EXTI9_5_IRQn
  55. #define KEY2_BUTTON_EXTI_IRQn_PRIORITY 0
  56. /** Wakeup push-button **/
  57. /*#define KEYUP_BUTTON_PIN GPIO_PIN_0
  58. #define KEYUP_BUTTON_GPIO_PORT GPIOA
  59. #define KEYUP_BUTTON_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
  60. #define KEYUP_BUTTON_GPIO_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
  61. #define KEYUP_BUTTON_EXTI_IRQn EXTI0_IRQn
  62. */
  63. /** BAT status pin **/
  64. #define BSP_BAT_STATUS_PORT GPIOA
  65. #define BSP_BAT_STATUS_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
  66. #define BSP_BAT_STATUS_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
  67. #define BSP_BAT_STATUS_CHARGING_PIN GPIO_PIN_3
  68. #define BSP_BAT_STATUS_STANDBY_PIN GPIO_PIN_2
  69. #define BSP_BAT_STATUS_SHIFT_COUNT 2
  70. #define BSP_BAT_STATUS_MASK (0x03<<BSP_BAT_STATUS_SHIFT_COUNT)
  71. /*#define BSP_BAT_STOP_PORT GPIOA
  72. #define BSP_BAT_STOP_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
  73. #define BSP_BAT_STOP_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
  74. #define BSP_BAT_STOP_PIN GPIO_PIN_2*/
  75. /*****Ext hardware watchdog**********/
  76. #define BSP_WATCHDOG_PORT GPIOC
  77. #define BSP_WATCHDOG_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
  78. #define BSP_WATCHDOG_CLK_DISABLE() __HAL_RCC_GPIOC_CLK_DISABLE()
  79. #define BSP_WATCHDOG_PIN GPIO_PIN_0
  80. #endif //HAL_GPIO_MODULE
  81. /*################################ RTC #######################################*/
  82. #if defined(HAL_RTC_MODULE_ENABLED)
  83. #define RTC_ENABLE 1
  84. //#define RTC_CLOCK_SOURCE_LSE
  85. #define RTC_CLOCK_SOURCE_LSI
  86. //#define RTC_ASYNCH_PREDIV 127U
  87. //#define RTC_SYNCH_PREDIV 255U
  88. #define RTC_ASYNCH_PREDIV 255U
  89. #define RTC_SYNCH_PREDIV 127U
  90. #define RTC_WAKEUP_CLOCK RTC_WAKEUPCLOCK_CK_SPRE_16BITS
  91. #define RTC_WAKEUP_COUNTER 0U
  92. //#define RTC_WAKEUP_CLOCK 2048U
  93. //#define RTC_WAKEUP_COUNTER RTC_WAKEUPCLOCK_RTCCLK_DIV16;
  94. #define RTC_WAKEUP_PRIORITY 0x0e
  95. #endif
  96. /*################################ SPI #######################################*/
  97. #if defined(HAL_SPI_MODULE_ENABLED)
  98. /* Maximum Timeout values for flags waiting loops. These timeouts are not based
  99. on accurate values, they just guarantee that the application will not remain
  100. stuck if the SPI communication is corrupted.
  101. You may modify these timeout values depending on CPU frequency and application
  102. conditions (interrupts routines ...). */
  103. #define SPIx_TIMEOUT_MAX 0x1000 /*<! The value of the maximal timeout for BUS waiting loops */
  104. /*
  105. SPI1: APB2(84MHZ)
  106. SPI2: APB1(42MHZ)
  107. SPI3: APB1(42MHZ)
  108. */
  109. /*############################### DWM #######################################*/
  110. #define DWM_SPIx SPI2
  111. #define DWM_SPIx_CLK_ENABLE() __HAL_RCC_SPI2_CLK_ENABLE()
  112. #define DWM_SPIx_CLK_DISABLE() __HAL_RCC_SPI2_CLK_DISABLE()
  113. #define DWM_SPIx_FORCE_RESET() __HAL_RCC_SPI2_FORCE_RESET()
  114. #define DWM_SPIx_RELEASE_RESET() __HAL_RCC_SPI2_RELEASE_RESET()
  115. #define DWM_SPIx_IRQn SPI2_IRQn
  116. #define DWM_SPIx_IRQ_PRIORITY 1
  117. #if 0
  118. #define DWM_SPIx_LOWSPEED_PRESCALER SPI_BAUDRATEPRESCALER_32
  119. #define DWM_SPIx_HIGHSPEED_PRESCALER SPI_BAUDRATEPRESCALER_4
  120. #else
  121. #define DWM_SPIx_LOWSPEED_PRESCALER SPI_BAUDRATEPRESCALER_16
  122. #define DWM_SPIx_HIGHSPEED_PRESCALER SPI_BAUDRATEPRESCALER_2
  123. #endif
  124. #define DWM_SPIx_CS_GPIO_PORT GPIOB
  125. #define DWM_SPIx_CS_PIN GPIO_PIN_12
  126. #define DWM_SPIx_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
  127. #define DWM_SPIx_Cs_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
  128. #define DWM_SPIx_GPIO_PORT GPIOB
  129. #define DWM_SPIx_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
  130. #define DWM_SPIx_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
  131. #define DWM_SPIx_GPIO_AF GPIO_AF5_SPI2
  132. #define DWM_SPIx_SCK_PIN GPIO_PIN_13
  133. #define DWM_SPIx_MISO_PIN GPIO_PIN_14
  134. #define DWM_SPIx_MOSI_PIN GPIO_PIN_15
  135. #define DWM_WAKEUP_PORT GPIOC
  136. #define DWM_WAKEUP_PIN GPIO_PIN_7
  137. #define DWM_WAKEUP_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
  138. #define DWM_WAKEUP_CLK_DISABLE() __HAL_RCC_GPIOC_CLK_DISABLE()
  139. #define DWM_RST_PORT GPIOC
  140. #define DWM_RST_PIN GPIO_PIN_8
  141. #define DWM_RST_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
  142. #define DWM_RST_CLK_DISABLE() __HAL_RCC_GPIOC_CLK_DISABLE()
  143. #define DWM_RST_IRQ EXTI9_5_IRQn
  144. #define DWM_RST_PRIORITY 0
  145. #if 1==BOARD_ANCHOR
  146. #define DWM_IRQ_PORT GPIOC
  147. #define DWM_IRQ_PIN GPIO_PIN_6
  148. #define DWM_IRQ_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
  149. #define DWM_IRQ_CLK_DISABLE() __HAL_RCC_GPIOC_CLK_DISABLE()
  150. #define DWM_IRQ_EXTI EXTI9_5_IRQn
  151. #define DWM_IRQ_EXTI_PRIORITY 0
  152. #else
  153. #define DWM_IRQ_PORT GPIOA
  154. #define DWM_IRQ_PIN GPIO_PIN_2
  155. #define DWM_IRQ_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
  156. #define DWM_IRQ_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
  157. #define DWM_IRQ_EXTI EXTI2_IRQn
  158. #define DWM_IRQ_EXTI_PRIORITY 0
  159. #endif
  160. /*############################### W5500 #######################################*/
  161. #define W5500_INT_MODE
  162. #define W5500_SPIx SPI1
  163. #define W5500_SPIx_CLK_ENABLE() __HAL_RCC_SPI1_CLK_ENABLE()
  164. #define W5500_SPIx_CLK_DISABLE() __HAL_RCC_SPI1_CLK_DISABLE()
  165. #define W5500_SPIx_FORCE_RESET() __HAL_RCC_SPI1_FORCE_RESET()
  166. #define W5500_SPIx_RELEASE_RESET() __HAL_RCC_SPI1_RELEASE_RESET()
  167. #define W5500_SPIx_PRESCALER SPI_BAUDRATEPRESCALER_8
  168. #define W5500_SPIx_SCS_PORT GPIOA
  169. #define W5500_SPIx_SCS_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
  170. #define W5500_SPIx_SCS_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
  171. #define W5500_SPIx_SCS_PIN GPIO_PIN_4
  172. #define W5500_SPIx_GPIO_PORT GPIOA
  173. #define W5500_SPIx_AF GPIO_AF5_SPI1
  174. #define W5500_SPIx_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
  175. #define W5500_SPIx_GPIO_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
  176. #define W5500_SPIx_SCLK_PIN GPIO_PIN_5
  177. #define W5500_SPIx_MISO_PIN GPIO_PIN_6
  178. #define W5500_SPIx_MOSI_PIN GPIO_PIN_7
  179. #if 1==BOARD_ANCHOR
  180. #define W5500_CHIP_RESET_PORT GPIOB
  181. #define W5500_CHIP_RESET_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
  182. #define W5500_CHIP_RESET_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
  183. #define W5500_CHIP_RESET_PIN GPIO_PIN_6
  184. #define W5500_EXTI_IRQ_PORT GPIOB
  185. #define W5500_EXTI_IRQ_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
  186. #define W5500_EXTI_IRQ_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
  187. #define W5500_EXTI_IRQ_PIN GPIO_PIN_7
  188. #define W5500_EXTI_IRQ_IRQn EXTI9_5_IRQn
  189. //#define W5500_EXIT_IRQ_PRIORITY 0x05
  190. #define W5500_EXIT_IRQ_PRIORITY 0
  191. #else
  192. #define W5500_CHIP_RESET_PORT GPIOB
  193. #define W5500_CHIP_RESET_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
  194. #define W5500_CHIP_RESET_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
  195. #define W5500_CHIP_RESET_PIN GPIO_PIN_10
  196. #define W5500_EXTI_IRQ_IRQn EXTI15_10_IRQn
  197. #define W5500_EXIT_IRQ_PRIORITY 0x05
  198. #define W5500_EXTI_IRQ_PORT GPIOB
  199. #define W5500_EXTI_IRQ_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
  200. #define W5500_EXTI_IRQ_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
  201. #define W5500_EXTI_IRQ_PIN GPIO_PIN_11
  202. #define W5500_EXTI_IRQ_IRQn EXTI15_10_IRQn
  203. #define W5500_EXIT_IRQ_PRIORITY 0x05
  204. #endif
  205. /*############################### RAK411 #######################################*/
  206. #define RAK_SPIx SPI3
  207. #define RAK_SPIx_CLK_ENABLE() __HAL_RCC_SPI3_CLK_ENABLE()
  208. #define RAK_SPIx_CLK_DISABLE() __HAL_RCC_SPI3_CLK_DISABLE()
  209. #define RAK_SPIx_FORCE_RESET() __HAL_RCC_SPI3_FORCE_RESET()
  210. #define RAK_SPIx_RELEASE_RESET() __HAL_RCC_SPI3_RELEASE_RESET()
  211. #define RAK_SPIx_MODE SPI_MODE_MASTER
  212. #define RAK_SPIx_PRESCALER SPI_BAUDRATEPRESCALER_4
  213. #define RAK_SPIx_IRQn SPI3_IRQn
  214. #define RAK_SPIx_IRQ_PRIORITY 1
  215. #define RAK_SPIx_CS_GPIO_PORT GPIOA
  216. #define RAK_SPIx_CS_PIN GPIO_PIN_15
  217. #define RAK_SPIx_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
  218. #define RAK_SPIx_CS_GPIO_CLK_DISABLE() __HAL_RCC_GPIOA_CLK_DISABLE()
  219. #define RAK_SPIx_CS_GPIO_PULL GPIO_PULLUP
  220. #define RAK_SPIx_CS_Clear() HAL_GPIO_WritePin(RAK_SPIx_CS_GPIO_PORT, RAK_SPIx_CS_PIN, GPIO_PIN_RESET)
  221. #define RAK_SPIx_CS_Set() HAL_GPIO_WritePin(RAK_SPIx_CS_GPIO_PORT, RAK_SPIx_CS_PIN, GPIO_PIN_SET)
  222. #define RAK_SPIx_SCK_PIN GPIO_PIN_10
  223. #define RAK_SPIx_SCK_GPIO_PORT GPIOC
  224. #define RAK_SPIx_SCK_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
  225. #define RAK_SPIx_SCK_GPIO_CLK_DISABLE() __HAL_RCC_GPIOC_CLK_DISABLE()
  226. #define RAK_SPIx_SCK_AF GPIO_AF6_SPI3
  227. #define RAK_SPIx_MISO_PIN GPIO_PIN_11
  228. #define RAK_SPIx_MISO_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
  229. #define RAK_SPIx_MISO_GPIO_CLK_DISABLE() __HAL_RCC_GPIOC_CLK_DISABLE()
  230. #define RAK_SPIx_MISO_GPIO_PORT GPIOC
  231. #define RAK_SPIx_MISO_AF GPIO_AF6_SPI3
  232. #define RAK_SPIx_MOSI_PIN GPIO_PIN_12
  233. #define RAK_SPIx_MOSI_GPIO_PORT GPIOC
  234. #define RAK_SPIx_MOSI_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
  235. #define RAK_SPIx_MOSI_GPIO_CLK_DISABLE() __HAL_RCC_GPIOC_CLK_DISABLE()
  236. #define RAK_SPIx_MOSI_AF GPIO_AF6_SPI3
  237. #if 1==BOARD_ANCHOR
  238. #define RAK_SPIx_INT_PIN GPIO_PIN_4
  239. #else
  240. #define RAK_SPIx_INT_PIN GPIO_PIN_5
  241. #endif
  242. #define RAK_SPIx_INT_GPIO_PORT GPIOB
  243. #define RAK_SPIx_INT_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
  244. #define RAK_SPIx_INT_GPIO_CLK_DISABLE() __HAL_RCC_GPIOB_CLK_DISABLE()
  245. #define RAK_SPI_INT_GPIO_Status() HAL_GPIO_ReadPin(RAK_SPIx_INT_GPIO_PORT, RAK_SPIx_INT_PIN)
  246. #if 1==BOARD_ANCHOR
  247. #define RAK_SPI_INT_IRQ EXTI9_5_IRQn
  248. #define RAK_SPI_INT_IRQ_PRIORITY 0
  249. #else
  250. #define RAK_SPI_INT_IRQ EXTI4_IRQn
  251. #define RAK_SPI_INT_IRQ_PRIORITY 5
  252. #endif
  253. #define RAK_Reset_PIN GPIO_PIN_2
  254. #define RAK_Reset_GPIO_PORT GPIOD
  255. #define RAK_Reset_GPIO_CLK_ENABLE() __HAL_RCC_GPIOD_CLK_ENABLE()
  256. #define RAK_Reset_GPIO_CLK_DISABLE() __HAL_RCC_GPIOD_CLK_DISABLE()
  257. #define RAK_Reset_Clear() HAL_GPIO_WritePin(RAK_Reset_GPIO_PORT, RAK_Reset_PIN, GPIO_PIN_RESET)
  258. #define RAK_Reset_Set() HAL_GPIO_WritePin(RAK_Reset_GPIO_PORT, RAK_Reset_PIN, GPIO_PIN_SET)
  259. #endif
  260. /*################################ UART #######################################*/
  261. /* DMA */
  262. #define UART_DMA_ENABLE 0
  263. #define UARTBUFFERSIZE 256
  264. #if defined(HAL_UART_MODULE_ENABLED)
  265. #define MODULE_USART1 USART1
  266. #define USART1_CLOCK_ENABLE() __HAL_RCC_USART1_CLK_ENABLE()
  267. #define USART1_FORCE_RESET() __HAL_RCC_USART1_FORCE_RESET()
  268. #define USART1_RELEASE_RESET() __HAL_RCC_USART1_RELEASE_RESET()
  269. #define USART1_IRQn USART1_IRQn
  270. #define USART1_IRQ_Handler USART1_IRQHandler
  271. #define USART1_DMA_CLK_ENABLE() __HAL_RCC_DMA2_CLK_ENABLE()
  272. //#define USART1_BAUDRATE 1382400//115200
  273. #define USART1_BAUDRATE 4000000
  274. #define USART1_IRQ_PRIORITY 0x0b
  275. #define USART1_TX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
  276. #define USART1_TX_GPIO_PIN GPIO_PIN_9
  277. #define USART1_TX_GPIO_PORT GPIOA
  278. #define USART1_TX_GPIO_AF GPIO_AF7_USART1
  279. #define USART1_RX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
  280. #define USART1_RX_GPIO_PIN GPIO_PIN_10
  281. #define USART1_RX_GPIO_PORT GPIOA
  282. #define USART1_RX_GPIO_AF GPIO_AF7_USART1
  283. #define USART1_TX_DMA_CHANNEL DMA_CHANNEL_4
  284. #define USART1_TX_DMA_STREAM DMA2_Stream7
  285. #define USART1_DMA_TX_IRQn DMA2_Stream7_IRQn
  286. #define USART1_DMA_TX_IRQHandler DMA2_Stream7_IRQHandler
  287. #define USART1_DMA_TX_IRQ_PRIORITY 0x0d
  288. #define USART1_RX_DMA_CHANNEL DMA_CHANNEL_4
  289. #define USART1_RX_DMA_STREAM DMA2_Stream5
  290. #define USART1_DMA_RX_IRQn DMA2_Stream5_IRQn
  291. #define USART1_DMA_RX_IRQHandler DMA2_Stream5_IRQHandler
  292. #define USART1_DMA_RX_IRQ_PRIORITY 0x0c
  293. #define MODULE_USART2 USART2
  294. #define USART2_CLOCK_ENABLE() __HAL_RCC_USART2_CLK_ENABLE()
  295. #define USART2_FORCE_RESET() __HAL_RCC_USART2_FORCE_RESET()
  296. #define USART2_RELEASE_RESET() __HAL_RCC_USART2_RELEASE_RESET()
  297. #define USART2_IRQn USART2_IRQn
  298. #define USART2_IRQ_Handler USART2_IRQHandler
  299. #define USART2_BAUDRATE 115200
  300. #define USART2_DMA_CLK_ENABLE() __HAL_RCC_DMA1_CLK_ENABLE()
  301. #define USART2_IRQ_PRIORITY 0x06
  302. #define USART2_TX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
  303. #define USART2_TX_GPIO_PIN GPIO_PIN_2
  304. #define USART2_TX_GPIO_PORT GPIOA
  305. #define USART2_TX_GPIO_AF GPIO_AF7_USART2
  306. #define USART2_RX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
  307. #define USART2_RX_GPIO_PIN GPIO_PIN_3
  308. #define USART2_RX_GPIO_PORT GPIOA
  309. #define USART2_RX_GPIO_AF GPIO_AF7_USART2
  310. #define USART2_TX_DMA_CHANNEL DMA_CHANNEL_4
  311. #define USART2_TX_DMA_STREAM DMA1_Stream6
  312. #define USART2_DMA_TX_IRQn DMA1_Stream6_IRQn
  313. #define USART2_DMA_TX_IRQHandler DMA1_Stream6_IRQHandler
  314. #define USART2_DMA_TX_IRQ_PRIORITY 0x07
  315. #define USART2_RX_DMA_CHANNEL DMA_CHANNEL_4
  316. #define USART2_RX_DMA_STREAM DMA1_Stream5
  317. #define USART2_DMA_RX_IRQn DMA1_Stream5_IRQn
  318. #define USART2_DMA_RX_IRQHandler DMA1_Stream5_IRQHandler
  319. #define USART2_DMA_RX_IRQ_PRIORITY 0x06
  320. #define MODULE_UART4 UART4
  321. #define UART4_CLOCK_ENABLE() __HAL_RCC_UART4_CLK_ENABLE()
  322. #define UART4_FORCE_RESET() __HAL_RCC_UART4_FORCE_RESET()
  323. #define UART4_RELEASE_RESET() __HAL_RCC_UART4_RELEASE_RESET()
  324. #define UART4_DMA_CLK_ENABLE() __HAL_RCC_DMA1_CLK_ENABLE()
  325. #define UART4_BAUDRATE 4000000
  326. #define UART4_IRQ_PRIORITY 0x0b
  327. #define UART4_TX_GPIO_PORT GPIOA
  328. #define UART4_TX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
  329. #define UART4_TX_GPIO_PIN GPIO_PIN_0
  330. #define UART4_TX_GPIO_AF GPIO_AF8_UART4
  331. #define UART4_RX_GPIO_PORT GPIOA
  332. #define UART4_RX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
  333. #define UART4_RX_GPIO_PIN GPIO_PIN_1
  334. #define UART4_RX_GPIO_AF GPIO_AF8_UART4
  335. #define UART4_TX_DMA_CHANNEL DMA_CHANNEL_4
  336. #define UART4_TX_DMA_STREAM DMA1_Stream4
  337. #define UART4_DMA_TX_IRQn DMA1_Stream4_IRQn
  338. #define UART4_DMA_TX_IRQHandler DMA1_Stream4_IRQHandler
  339. #define UART4_DMA_TX_IRQ_PRIORITY 0x0d
  340. #define UART4_RX_DMA_CHANNEL DMA_CHANNEL_4
  341. #define UART4_RX_DMA_STREAM DMA1_Stream2
  342. #define UART4_DMA_RX_IRQn DMA1_Stream2_IRQn
  343. #define UART4_DMA_RX_IRQHandler DMA1_Stream2_IRQHandler
  344. #define UART4_DMA_RX_IRQ_PRIORITY 0x0c
  345. #if BOARD_ANCHOR==1
  346. #define DEBUG_PORT UART4
  347. //#define DEBUG_BAUDRATE 4000000
  348. //#define DEBUG_BAUDRATE 256000
  349. //#define DEBUG_BAUDRATE 460800
  350. #define DEBUG_BAUDRATE 921600
  351. //#define DEBUG_BAUDRATE 1000000
  352. #else
  353. #define DEBUG_PORT USART1
  354. #define DEBUG_BAUDRATE 1382400
  355. //#define DEBUG_BAUDRATE 1000000
  356. #endif
  357. #if 0
  358. #define MODULE_USART6 USART6
  359. #define USART6_CLOCK_ENABLE() __HAL_RCC_USART6_CLK_ENABLE()
  360. #define USART6_FORCE_RESET() __HAL_RCC_USART6_FORCE_RESET()
  361. #define USART6_RELEASE_RESET() __HAL_RCC_USART6_RELEASE_RESET()
  362. #define USART6_IRQn USART6_IRQn
  363. #define USART6_IRQ_PRIORITY 0x06
  364. #define USART6_DEFAULT_BAUDRATE 115200
  365. //#define USART6_HIGH_BAUDRATE 256000
  366. //#define USART6_MAX_BAUDRATE 1382400
  367. #define USART6_MAX_BAUDRATE 4000000
  368. //#define USART6_MAX_BAUDRATE 4608000
  369. #define WIFI_UART_WORDLENGTH UART_WORDLENGTH_8B
  370. #define WIFI_UART_STOPBITS UART_STOPBITS_1
  371. #define WIFI_UART_PARITY UART_PARITY_NONE
  372. #define USART6_TX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
  373. #define USART6_TX_GPIO_PIN GPIO_PIN_6
  374. #define USART6_TX_GPIO_PORT GPIOC
  375. #define USART6_TX_GPIO_AF GPIO_AF8_USART6
  376. #define USART6_RX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
  377. #define USART6_RX_GPIO_PIN GPIO_PIN_7
  378. #define USART6_RX_GPIO_PORT GPIOC
  379. #define USART6_RX_GPIO_AF GPIO_AF8_USART6
  380. #define USART6_DMA_CLK_ENABLE() __HAL_RCC_DMA2_CLK_ENABLE()
  381. #define USART6_TX_DMA_CHANNEL DMA_CHANNEL_5
  382. #define USART6_TX_DMA_STREAM DMA2_Stream6
  383. #define USART6_DMA_TX_IRQn DMA2_Stream6_IRQn
  384. #define USART6_DMA_TX_IRQHandler DMA2_Stream6_IRQHandler
  385. #define USART6_DMA_TX_IRQ_PRIORITY 0x07
  386. #define USART6_RX_DMA_CHANNEL DMA_CHANNEL_5
  387. #define USART6_RX_DMA_STREAM DMA2_Stream1
  388. #define USART6_DMA_RX_IRQn DMA2_Stream1_IRQn
  389. #define USART6_DMA_RX_IRQHandler DMA2_Stream1_IRQHandler
  390. #define USART6_DMA_RX_IRQ_PRIORITY 0x06
  391. #else
  392. #define MODULE_USART6 UART4
  393. #define USART6_CLOCK_ENABLE() __HAL_RCC_UART4_CLK_ENABLE()
  394. #define USART6_FORCE_RESET() __HAL_RCC_UART4_FORCE_RESET()
  395. #define USART6_RELEASE_RESET() __HAL_RCC_UART4_RELEASE_RESET()
  396. #define USART6_IRQn UART4_IRQn
  397. #define USART6_IRQ_PRIORITY 0x06
  398. #define USART6_DEFAULT_BAUDRATE 115200
  399. #define USART6_HIGH_BAUDRATE 256000
  400. #define USART6_MAX_BAUDRATE 1382400
  401. //#define USART6_MAX_BAUDRATE 4608000
  402. #define USART6_TX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
  403. #define USART6_TX_GPIO_PIN GPIO_PIN_10
  404. #define USART6_TX_GPIO_PORT GPIOC
  405. #define USART6_TX_GPIO_AF GPIO_AF8_UART4
  406. #define USART6_RX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
  407. #define USART6_RX_GPIO_PIN GPIO_PIN_11
  408. #define USART6_RX_GPIO_PORT GPIOC
  409. #define USART6_RX_GPIO_AF GPIO_AF8_UART4
  410. #define USART6_DMA_CLK_ENABLE() __HAL_RCC_DMA2_CLK_ENABLE()
  411. #define USART6_TX_DMA_CHANNEL DMA_CHANNEL_5
  412. #define USART6_TX_DMA_STREAM DMA2_Stream6
  413. #define USART6_DMA_TX_IRQn DMA2_Stream6_IRQn
  414. #define USART6_DMA_TX_IRQHandler DMA2_Stream6_IRQHandler
  415. #define USART6_DMA_TX_IRQ_PRIORITY 0x07
  416. #define USART6_RX_DMA_CHANNEL DMA_CHANNEL_5
  417. #define USART6_RX_DMA_STREAM DMA2_Stream1
  418. #define USART6_DMA_RX_IRQn DMA2_Stream1_IRQn
  419. #define USART6_DMA_RX_IRQHandler DMA2_Stream1_IRQHandler
  420. #define USART6_DMA_RX_IRQ_PRIORITY 0x06
  421. #endif
  422. #define WIFI_LOWEST_BAUDRATE 115200
  423. #define WIFI_HIGHEST_BAUDRATE 4608000
  424. #define WIFI_UART_WORDLENGTH UART_WORDLENGTH_8B
  425. #define WIFI_UART_STOPBITS UART_STOPBITS_1
  426. #define WIFI_UART_PARITY UART_PARITY_NONE
  427. #define WIFI_CS_GPIO_PORT GPIOC
  428. #define WIFI_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
  429. #define WIFI_CS_PIN GPIO_PIN_8
  430. #define WIFI_CS_PIN_PULL GPIO_PULLDOWN
  431. #define WIFI_RST_GPIO_PORT GPIOC
  432. #define WIFI_RST_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
  433. #define WIFI_RST_PIN GPIO_PIN_7
  434. #define WIFI_RST_PIN_PULL GPIO_NOPULL
  435. #define WIFI_ENABLE_GPIO_PORT GPIOC
  436. #define WIFI_ENABLE_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
  437. #define WIFI_ENABLE_PIN GPIO_PIN_6
  438. #define WIFI_ENABLE_PIN_PULL GPIO_NOPULL
  439. #endif
  440. /*################################ ADC #######################################*/
  441. #if defined(HAL_ADC_MODULE_ENABLED)
  442. typedef enum{
  443. V5IN_CHANNEL = ADC_CHANNEL_14,
  444. VBAT_CHANNEL = ADC_CHANNEL_15,
  445. }eAdcChannels;
  446. #define BSP_ADCx ADC1
  447. #define BSP_ADCx_CLK_ENABLE() __HAL_RCC_ADC1_CLK_ENABLE()
  448. #define BSP_ADCx_CLK_DISABLE() __HAL_RCC_ADC1_CLK_DISABLE()
  449. #define BSP_ADCx_FORCE_RESET() __HAL_RCC_ADC_FORCE_RESET()
  450. #define BSP_ADCx_RELEASE_RESET() __HAL_RCC_ADC_RELEASE_RESET()
  451. #define BSP_ADCx_IRQn ADC_IRQn
  452. #define BSP_ADCx_IRQ_HANDLER ADC_IRQHandler
  453. #define BSP_ADCx_IRQ_PRIORITY 1
  454. #define BSP_ADCx_CHAN_PORT GPIOC
  455. #define BSP_ADCx_CHAN_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
  456. #define BSP_ADCx_CHAN_CLK_DISABLE() __HAL_RCC_GPIOC_CLK_DISABLE()
  457. #define BSP_ADCx_VBAT_PIN GPIO_PIN_5
  458. #define BSP_ADCx_V5IN_PIN GPIO_PIN_4
  459. typedef enum{
  460. ADC_DEINIT=0,
  461. ADC_INIT,
  462. ADC_IDLE,
  463. ADC_CONVERT,
  464. ADC_COMPLETE,
  465. ADC_ERROR,
  466. ADC_WAIT,//LAST ONE
  467. }eAdcStatus;
  468. typedef struct{
  469. eAdcStatus status;
  470. uint8_t count;
  471. uint16_t temp;
  472. eAdcChannels currentChannel;
  473. eAdcChannels lastChannel;
  474. uint16_t currentValue;
  475. uint16_t lastValue;
  476. }stAdcConvertStatus;
  477. #endif
  478. /*################################ I2C #######################################*/
  479. #if defined(HAL_I2C_MODULE_ENABLED)
  480. /* Definition for I2Cx clock resources */
  481. #define BSP_I2Cx I2C2
  482. #define BSP_I2Cx_CLK_ENABLE() __HAL_RCC_I2C2_CLK_ENABLE()
  483. #define BSP_I2Cx_FORCE_RESET() __HAL_RCC_I2C2_FORCE_RESET()
  484. #define BSP_I2Cx_RELEASE_RESET() __HAL_RCC_I2C2_RELEASE_RESET()
  485. #define BSP_I2Cx_SPEED 400000
  486. #define BSP_I2Cx_SLAVE_ADDRESS 0xf0
  487. #define BSP_I2Cx_SCL_GPIO_PORT GPIOB
  488. #define BSP_I2Cx_SCL_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
  489. #define BSP_I2Cx_SCL_PIN GPIO_PIN_10
  490. #define BSP_I2Cx_SCL_AF GPIO_AF4_I2C2
  491. #define BSP_I2Cx_SCL_PULL GPIO_NOPULL
  492. #define BSP_I2Cx_SDA_GPIO_PORT GPIOB
  493. #define BSP_I2Cx_SDA_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
  494. #define BSP_I2Cx_SDA_PIN GPIO_PIN_11
  495. #define BSP_I2Cx_SDA_AF GPIO_AF4_I2C2
  496. #define BSP_I2Cx_SDA_PULL GPIO_NOPULL
  497. #define BSP_EEROM_WRITE_PROTECT_PORT GPIOB
  498. #define BSP_EEROM_WRITE_PROTECT_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
  499. #define BSP_EEROM_WRITE_PROTECT_PIN GPIO_PIN_0
  500. #define BSP_EEROM_WRITE_PROTECT_PULL GPIO_NOPULL
  501. #define BSP_EEROM_WRITE_ENABLE() HAL_GPIO_WritePin(BSP_EEROM_WRITE_PROTECT_PORT, BSP_EEROM_WRITE_PROTECT_PIN, GPIO_PIN_RESET)
  502. #define BSP_EEROM_WRITE_FORBIDEN() HAL_GPIO_WritePin(BSP_EEROM_WRITE_PROTECT_PORT, BSP_EEROM_WRITE_PROTECT_PIN, GPIO_PIN_SET)
  503. #define BSP_RTC_INTERRUPT_PORT GPIOB
  504. #define BSP_RTC_INTERRUPT_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
  505. #define BSP_RTC_INTERRUPT_PIN GPIO_PIN_1
  506. #define BSP_RTC_INTERRUPT_PULL GPIO_NOPULL
  507. #define BSP_RTC_INTERRUPT_IRQn EXTI1_IRQn
  508. #define BSP_RTC_INTERRUPT_PRIORITY 0x05
  509. /*Device Address*/
  510. #define BSP_RTC_WR_ADDRESS 0x64
  511. #define BSP_RTC_RD_ADDRESS 0x65
  512. #define BSP_EEROM_WR_ADDRESS 0xA0
  513. #define BSP_EEROM_RD_ADDRESS 0xA1
  514. #endif
  515. #ifdef __cplusplus
  516. }
  517. #endif
  518. #endif /* __BSP_STM32F407DEV_H */