bsp.aun2402/source/BSP/bsp_STM32F405ANC.h

/**
  ******************************************************************************
  * @file    bsp_STM32F405ANC.h
  * @author
  * @version V0.1.0
  * @date    01-April-2018
  * @brief   This file contains definitions for ANCHOR hardware resources.
  * @Hardware DWM1000,RAK411,W5500,RX-8025T,ATMLH732,UART,LED/KEYS
  ******************************************************************************
  *
  *
  *
  *
  ******************************************************************************
  */

/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __BSP_STM32F405ANC_H
#define __BSP_STM32F405ANC_H

#ifdef __cplusplus
 extern "C" {
#endif

/* Includes ------------------------------------------------------------------*/
#include "stm32f4xx.h"
#include "stm32f4xx_hal.h"


/** @defgroup STM32F4_BSP Exported bootloader and application addresses!
  * @ the values in icf files should be same with the values here!!
  */
#define IAP_ADDRESS     0x08000000
#define APP_ADDRESS     0x08010000
#define STACK_MASK      0x2FFC0000
#define MEM_RAM_BASE    0x20000000

/*############################### GPIO #######################################*/
#if defined(HAL_GPIO_MODULE_ENABLED)
/** LED **/
#define LED_UWB_PIN                             GPIO_PIN_10
#define LED_UWB_GPIO_PORT                       GPIOA
#define LED_UWB_GPIO_CLK_ENABLE()               __HAL_RCC_GPIOA_CLK_ENABLE()
#define LED_UWB_GPIO_CLK_DISABLE()              __HAL_RCC_GPIOA_CLK_DISABLE()

#define LED_COM_PIN                             GPIO_PIN_9
#define LED_COM_GPIO_PORT                       GPIOA
#define LED_COM_GPIO_CLK_ENABLE()               __HAL_RCC_GPIOA_CLK_ENABLE()
#define LED_COM_GPIO_CLK_DISABLE()              __HAL_RCC_GPIOA_CLK_DISABLE()

#define LED_BAT_PIN                             GPIO_PIN_8
#define LED_BAT_GPIO_PORT                       GPIOA
#define LED_BAT_GPIO_CLK_ENABLE()               __HAL_RCC_GPIOA_CLK_ENABLE()
#define LED_BAT_GPIO_CLK_DISABLE()              __HAL_RCC_GPIOA_CLK_DISABLE()

#define LED_RUN_PIN                             GPIO_PIN_9
#define LED_RUN_GPIO_PORT                       GPIOC
#define LED_RUN_GPIO_CLK_ENABLE()               __HAL_RCC_GPIOC_CLK_ENABLE()
#define LED_RUN_GPIO_CLK_DISABLE()              __HAL_RCC_GPIOC_CLK_DISABLE()

/** BUTTON **/
#define KEY1_BUTTON_PIN                         GPIO_PIN_9
#define KEY1_BUTTON_GPIO_PORT                   GPIOB
#define KEY1_BUTTON_GPIO_CLK_ENABLE()           __HAL_RCC_GPIOB_CLK_ENABLE()
#define KEY1_BUTTON_GPIO_CLK_DISABLE()          __HAL_RCC_GPIOB_CLK_DISABLE()
#define KEY1_BUTTON_EXTI_IRQn                   EXTI9_5_IRQn
#define KEY1_BUTTON_EXTI_IRQn_PRIORITY          1

#define KEY2_BUTTON_PIN                         GPIO_PIN_8
#define KEY2_BUTTON_GPIO_PORT                   GPIOB
#define KEY2_BUTTON_GPIO_CLK_ENABLE()           __HAL_RCC_GPIOB_CLK_ENABLE()
#define KEY2_BUTTON_GPIO_CLK_DISABLE()          __HAL_RCC_GPIOB_CLK_DISABLE()
#define KEY2_BUTTON_EXTI_IRQn                   EXTI9_5_IRQn
#define KEY2_BUTTON_EXTI_IRQn_PRIORITY          1

#define KEY_PRESSED                             (0) //

/** BAT status pin **/
#define BSP_BAT_STATUS_PORT                     GPIOA
#define BSP_BAT_STATUS_CLK_ENABLE()             __HAL_RCC_GPIOA_CLK_ENABLE()
#define BSP_BAT_STATUS_CLK_DISABLE()            __HAL_RCC_GPIOA_CLK_DISABLE()
#define BSP_BAT_STATUS_CHARGING_PIN             GPIO_PIN_3
#define BSP_BAT_STATUS_STANDBY_PIN              GPIO_PIN_2
#define BSP_BAT_STATUS_SHIFT_COUNT              3
#define BSP_BAT_STATUS_MASK                     (0x03<<BSP_BAT_STATUS_SHIFT_COUNT)

/*****Ext hardware watchdog**********/
#define BSP_WATCHDOG_PORT                       GPIOC
#define BSP_WATCHDOG_CLK_ENABLE()               __HAL_RCC_GPIOC_CLK_ENABLE()
#define BSP_WATCHDOG_CLK_DISABLE()              __HAL_RCC_GPIOC_CLK_DISABLE()
#define BSP_WATCHDOG_PIN                        GPIO_PIN_0

#endif //HAL_GPIO_MODULE

/*################################ RTC #######################################*/
#if defined(HAL_RTC_MODULE_ENABLED)
#define RTC_ENABLE                              1

//#define RTC_CLOCK_SOURCE_LSE
#define RTC_CLOCK_SOURCE_LSI

//#define RTC_ASYNCH_PREDIV                     127U
//#define RTC_SYNCH_PREDIV                      255U
#define RTC_ASYNCH_PREDIV                       255U
#define RTC_SYNCH_PREDIV                        127U

#define RTC_WAKEUP_CLOCK                        RTC_WAKEUPCLOCK_CK_SPRE_16BITS
#define RTC_WAKEUP_COUNTER                      0U
//#define RTC_WAKEUP_CLOCK                        2048U
//#define RTC_WAKEUP_COUNTER                      RTC_WAKEUPCLOCK_RTCCLK_DIV16;
#define RTC_WAKEUP_PRIORITY                     0x0e
#endif

/*################################ SPI #######################################*/
#if defined(HAL_SPI_MODULE_ENABLED)
/* Maximum Timeout values for flags waiting loops. These timeouts are not based
   on accurate values, they just guarantee that the application will not remain
   stuck if the SPI communication is corrupted.
   You may modify these timeout values depending on CPU frequency and application
   conditions (interrupts routines ...). */
#define SPIx_TIMEOUT_MAX                        0x1000 /*<! The value of the maximal timeout for BUS waiting loops */

/*
       SPI1: APB2(84MHZ)
       SPI2: APB1(42MHZ)
       SPI3: APB1(42MHZ)
*/
/*############################### DWM #######################################*/
#define DWM_SPIx                                SPI2
#define DWM_SPIx_CLK_ENABLE()                   __HAL_RCC_SPI2_CLK_ENABLE()
#define DWM_SPIx_CLK_DISABLE()                  __HAL_RCC_SPI2_CLK_DISABLE()
#define DWM_SPIx_FORCE_RESET()                  __HAL_RCC_SPI2_FORCE_RESET()
#define DWM_SPIx_RELEASE_RESET()                __HAL_RCC_SPI2_RELEASE_RESET()
#define DWM_SPIx_IRQn                           SPI2_IRQn
#define DWM_SPIx_IRQ_PRIORITY                   1

#define DWM_SPIx_LOWSPEED_PRESCALER             SPI_BAUDRATEPRESCALER_16
#define DWM_SPIx_HIGHSPEED_PRESCALER            SPI_BAUDRATEPRESCALER_2

#define DWM_SPIx_CS_GPIO_PORT                   GPIOB
#define DWM_SPIx_CS_PIN                         GPIO_PIN_12
#define DWM_SPIx_CS_GPIO_CLK_ENABLE()           __HAL_RCC_GPIOB_CLK_ENABLE()
#define DWM_SPIx_Cs_GPIO_CLK_DISABLE()          __HAL_RCC_GPIOB_CLK_DISABLE()

#define DWM_SPIx_GPIO_PORT                      GPIOB
#define DWM_SPIx_GPIO_CLK_ENABLE()              __HAL_RCC_GPIOB_CLK_ENABLE()
#define DWM_SPIx_GPIO_CLK_DISABLE()             __HAL_RCC_GPIOB_CLK_DISABLE()
#define DWM_SPIx_GPIO_AF                        GPIO_AF5_SPI2
#define DWM_SPIx_SCK_PIN                        GPIO_PIN_13
#define DWM_SPIx_MISO_PIN                       GPIO_PIN_14
#define DWM_SPIx_MOSI_PIN                       GPIO_PIN_15

#define DWM_WAKEUP_PORT                         GPIOC
#define DWM_WAKEUP_PIN                          GPIO_PIN_7
#define DWM_WAKEUP_CLK_ENABLE()                 __HAL_RCC_GPIOC_CLK_ENABLE()
#define DWM_WAKEUP_CLK_DISABLE()                __HAL_RCC_GPIOC_CLK_DISABLE()

#define DWM_RST_PORT                            GPIOC
#define DWM_RST_PIN                             GPIO_PIN_8
#define DWM_RST_CLK_ENABLE()                    __HAL_RCC_GPIOC_CLK_ENABLE()
#define DWM_RST_CLK_DISABLE()                   __HAL_RCC_GPIOC_CLK_DISABLE()
#define DWM_RST_IRQ                             EXTI9_5_IRQn
#define DWM_RST_PRIORITY                        1

#define DWM_IRQ_PORT                            GPIOC
#define DWM_IRQ_PIN                             GPIO_PIN_6
#define DWM_IRQ_CLK_ENABLE()                    __HAL_RCC_GPIOC_CLK_ENABLE()
#define DWM_IRQ_CLK_DISABLE()                   __HAL_RCC_GPIOC_CLK_DISABLE()
#define DWM_IRQ_EXTI                            EXTI9_5_IRQn
#define DWM_IRQ_EXTI_PRIORITY                   1

/*############################### W5500 #######################################*/
//#define W5500_INT_MODE
#define W5500_SPIx                              SPI1
#define W5500_SPIx_CLK_ENABLE()                 __HAL_RCC_SPI1_CLK_ENABLE()
#define W5500_SPIx_CLK_DISABLE()                __HAL_RCC_SPI1_CLK_DISABLE()
#define W5500_SPIx_FORCE_RESET()                __HAL_RCC_SPI1_FORCE_RESET()
#define W5500_SPIx_RELEASE_RESET()              __HAL_RCC_SPI1_RELEASE_RESET()
//#define W5500_SPIx_PRESCALER                    SPI_BAUDRATEPRESCALER_8
#define W5500_SPIx_PRESCALER                    SPI_BAUDRATEPRESCALER_4

#define W5500_SPIx_SCS_PORT                     GPIOA
#define W5500_SPIx_SCS_CLK_ENABLE()             __HAL_RCC_GPIOA_CLK_ENABLE()
#define W5500_SPIx_SCS_CLK_DISABLE()            __HAL_RCC_GPIOA_CLK_DISABLE()
#define W5500_SPIx_SCS_PIN                      GPIO_PIN_4

#define W5500_SPIx_GPIO_PORT                    GPIOA
#define W5500_SPIx_AF                           GPIO_AF5_SPI1
#define W5500_SPIx_GPIO_CLK_ENABLE()            __HAL_RCC_GPIOA_CLK_ENABLE()
#define W5500_SPIx_GPIO_CLK_DISABLE()           __HAL_RCC_GPIOA_CLK_DISABLE()
#define W5500_SPIx_SCLK_PIN                     GPIO_PIN_5
#define W5500_SPIx_MISO_PIN                     GPIO_PIN_6
#define W5500_SPIx_MOSI_PIN                     GPIO_PIN_7

#define W5500_CHIP_RESET_PORT                   GPIOB
#define W5500_CHIP_RESET_CLK_ENABLE()           __HAL_RCC_GPIOB_CLK_ENABLE()
#define W5500_CHIP_RESET_CLK_DISABLE()          __HAL_RCC_GPIOB_CLK_DISABLE()
#define W5500_CHIP_RESET_PIN                    GPIO_PIN_6

#define W5500_EXTI_IRQ_PORT                     GPIOB
#define W5500_EXTI_IRQ_CLK_ENABLE()            __HAL_RCC_GPIOB_CLK_ENABLE()
#define W5500_EXTI_IRQ_CLK_DISABLE()           __HAL_RCC_GPIOB_CLK_DISABLE()
#define W5500_EXTI_IRQ_PIN                      GPIO_PIN_7
#define W5500_EXTI_IRQ_IRQn                     EXTI9_5_IRQn
#define W5500_EXIT_IRQ_PRIORITY                 1


/*############################### RAK411 #######################################*/
#define RAK_SPIx                                SPI3
#define RAK_SPIx_CLK_ENABLE()                   __HAL_RCC_SPI3_CLK_ENABLE()
#define RAK_SPIx_CLK_DISABLE()                  __HAL_RCC_SPI3_CLK_DISABLE()
#define RAK_SPIx_FORCE_RESET()                  __HAL_RCC_SPI3_FORCE_RESET()
#define RAK_SPIx_RELEASE_RESET()                __HAL_RCC_SPI3_RELEASE_RESET()
#define RAK_SPIx_MODE                           SPI_MODE_MASTER
#define RAK_SPIx_PRESCALER                      SPI_BAUDRATEPRESCALER_4

#define RAK_SPIx_IRQn                           SPI3_IRQn
#define RAK_SPIx_IRQ_PRIORITY                   2

#define RAK_SPIx_CS_GPIO_PORT                   GPIOA
#define RAK_SPIx_CS_PIN                         GPIO_PIN_15
#define RAK_SPIx_CS_GPIO_CLK_ENABLE()           __HAL_RCC_GPIOA_CLK_ENABLE()
#define RAK_SPIx_CS_GPIO_CLK_DISABLE()          __HAL_RCC_GPIOA_CLK_DISABLE()
#define RAK_SPIx_CS_GPIO_PULL                   GPIO_PULLUP
#define RAK_SPIx_CS_Clear()                     HAL_GPIO_WritePin(RAK_SPIx_CS_GPIO_PORT, RAK_SPIx_CS_PIN, GPIO_PIN_RESET)
#define RAK_SPIx_CS_Set()                       HAL_GPIO_WritePin(RAK_SPIx_CS_GPIO_PORT, RAK_SPIx_CS_PIN, GPIO_PIN_SET)

#define RAK_SPIx_SCK_PIN                        GPIO_PIN_10
#define RAK_SPIx_SCK_GPIO_PORT                  GPIOC
#define RAK_SPIx_SCK_GPIO_CLK_ENABLE()          __HAL_RCC_GPIOC_CLK_ENABLE()
#define RAK_SPIx_SCK_GPIO_CLK_DISABLE()         __HAL_RCC_GPIOC_CLK_DISABLE()
#define RAK_SPIx_SCK_AF                         GPIO_AF6_SPI3
#define RAK_SPIx_MISO_PIN                       GPIO_PIN_11
#define RAK_SPIx_MISO_GPIO_CLK_ENABLE()         __HAL_RCC_GPIOC_CLK_ENABLE()
#define RAK_SPIx_MISO_GPIO_CLK_DISABLE()        __HAL_RCC_GPIOC_CLK_DISABLE()
#define RAK_SPIx_MISO_GPIO_PORT                 GPIOC
#define RAK_SPIx_MISO_AF                        GPIO_AF6_SPI3
#define RAK_SPIx_MOSI_PIN                       GPIO_PIN_12
#define RAK_SPIx_MOSI_GPIO_PORT                 GPIOC
#define RAK_SPIx_MOSI_GPIO_CLK_ENABLE()         __HAL_RCC_GPIOC_CLK_ENABLE()
#define RAK_SPIx_MOSI_GPIO_CLK_DISABLE()        __HAL_RCC_GPIOC_CLK_DISABLE()
#define RAK_SPIx_MOSI_AF                        GPIO_AF6_SPI3

#define RAK_SPIx_INT_PIN                        GPIO_PIN_4
#define RAK_SPIx_INT_GPIO_PORT                  GPIOB
#define RAK_SPIx_INT_GPIO_CLK_ENABLE()          __HAL_RCC_GPIOB_CLK_ENABLE()
#define RAK_SPIx_INT_GPIO_CLK_DISABLE()         __HAL_RCC_GPIOB_CLK_DISABLE()
#define RAK_SPI_INT_GPIO_Status()               HAL_GPIO_ReadPin(RAK_SPIx_INT_GPIO_PORT, RAK_SPIx_INT_PIN)
#define RAK_SPI_INT_IRQ                         EXTI4_IRQn
#define RAK_SPI_INT_IRQ_PRIORITY                3

#define RAK_Reset_PIN                           GPIO_PIN_2
#define RAK_Reset_GPIO_PORT                     GPIOD
#define RAK_Reset_GPIO_CLK_ENABLE()             __HAL_RCC_GPIOD_CLK_ENABLE()
#define RAK_Reset_GPIO_CLK_DISABLE()            __HAL_RCC_GPIOD_CLK_DISABLE()
#define RAK_Reset_Clear()                       HAL_GPIO_WritePin(RAK_Reset_GPIO_PORT, RAK_Reset_PIN, GPIO_PIN_RESET)
#define RAK_Reset_Set()                         HAL_GPIO_WritePin(RAK_Reset_GPIO_PORT, RAK_Reset_PIN, GPIO_PIN_SET)

#endif

/*################################ UART #######################################*/
/* DMA */
#define UART_DMA_ENABLE                         0

#define UARTBUFFERSIZE                          256

#if defined(HAL_UART_MODULE_ENABLED)
#define MODULE_USART1                           USART1
#define USART1_CLOCK_ENABLE()                   __HAL_RCC_USART1_CLK_ENABLE()
#define USART1_FORCE_RESET()                    __HAL_RCC_USART1_FORCE_RESET()
#define USART1_RELEASE_RESET()                  __HAL_RCC_USART1_RELEASE_RESET()
#define USART1_IRQn                             USART1_IRQn
#define USART1_IRQ_Handler                      USART1_IRQHandler
#define USART1_DMA_CLK_ENABLE()                 __HAL_RCC_DMA2_CLK_ENABLE()
//#define USART1_BAUDRATE                         1382400//115200
#define USART1_BAUDRATE                         4000000
#define USART1_IRQ_PRIORITY                     0x0b

#define USART1_TX_GPIO_CLK_ENABLE()             __HAL_RCC_GPIOA_CLK_ENABLE()
#define USART1_TX_GPIO_PIN                      GPIO_PIN_9
#define USART1_TX_GPIO_PORT                     GPIOA
#define USART1_TX_GPIO_AF                       GPIO_AF7_USART1

#define USART1_RX_GPIO_CLK_ENABLE()             __HAL_RCC_GPIOA_CLK_ENABLE()
#define USART1_RX_GPIO_PIN                      GPIO_PIN_10
#define USART1_RX_GPIO_PORT                     GPIOA
#define USART1_RX_GPIO_AF                       GPIO_AF7_USART1

#define USART1_TX_DMA_CHANNEL                   DMA_CHANNEL_4
#define USART1_TX_DMA_STREAM                    DMA2_Stream7
#define USART1_DMA_TX_IRQn                      DMA2_Stream7_IRQn
#define USART1_DMA_TX_IRQHandler                DMA2_Stream7_IRQHandler
#define USART1_DMA_TX_IRQ_PRIORITY              0x0d
#define USART1_RX_DMA_CHANNEL                   DMA_CHANNEL_4
#define USART1_RX_DMA_STREAM                    DMA2_Stream5
#define USART1_DMA_RX_IRQn                      DMA2_Stream5_IRQn
#define USART1_DMA_RX_IRQHandler                DMA2_Stream5_IRQHandler
#define USART1_DMA_RX_IRQ_PRIORITY              0x0c


#define MODULE_USART2                           USART2
#define USART2_CLOCK_ENABLE()                   __HAL_RCC_USART2_CLK_ENABLE()
#define USART2_FORCE_RESET()                    __HAL_RCC_USART2_FORCE_RESET()
#define USART2_RELEASE_RESET()                  __HAL_RCC_USART2_RELEASE_RESET()
#define USART2_IRQn                             USART2_IRQn
#define USART2_IRQ_Handler                      USART2_IRQHandler
#define USART2_BAUDRATE                         115200
#define USART2_DMA_CLK_ENABLE()                 __HAL_RCC_DMA1_CLK_ENABLE()
#define USART2_IRQ_PRIORITY                     0x06

#define USART2_TX_GPIO_CLK_ENABLE()             __HAL_RCC_GPIOA_CLK_ENABLE()
#define USART2_TX_GPIO_PIN                      GPIO_PIN_2
#define USART2_TX_GPIO_PORT                     GPIOA
#define USART2_TX_GPIO_AF                       GPIO_AF7_USART2

#define USART2_RX_GPIO_CLK_ENABLE()             __HAL_RCC_GPIOA_CLK_ENABLE()
#define USART2_RX_GPIO_PIN                      GPIO_PIN_3
#define USART2_RX_GPIO_PORT                     GPIOA
#define USART2_RX_GPIO_AF                       GPIO_AF7_USART2

#define USART2_TX_DMA_CHANNEL                   DMA_CHANNEL_4
#define USART2_TX_DMA_STREAM                    DMA1_Stream6
#define USART2_DMA_TX_IRQn                      DMA1_Stream6_IRQn
#define USART2_DMA_TX_IRQHandler                DMA1_Stream6_IRQHandler
#define USART2_DMA_TX_IRQ_PRIORITY              0x07
#define USART2_RX_DMA_CHANNEL                   DMA_CHANNEL_4
#define USART2_RX_DMA_STREAM                    DMA1_Stream5
#define USART2_DMA_RX_IRQn                      DMA1_Stream5_IRQn
#define USART2_DMA_RX_IRQHandler                DMA1_Stream5_IRQHandler
#define USART2_DMA_RX_IRQ_PRIORITY              0x06


#define MODULE_UART4                           UART4
#define UART4_CLOCK_ENABLE()                   __HAL_RCC_UART4_CLK_ENABLE()
#define UART4_FORCE_RESET()                    __HAL_RCC_UART4_FORCE_RESET()
#define UART4_RELEASE_RESET()                  __HAL_RCC_UART4_RELEASE_RESET()
#define UART4_DMA_CLK_ENABLE()                 __HAL_RCC_DMA1_CLK_ENABLE()
#define UART4_BAUDRATE                         4000000
#if defined(STM32F405_BOOTLOADER)
#define UART4_IRQ_PRIORITY                     1
#else
#define UART4_IRQ_PRIORITY                     0x0b
#endif

#define UART4_TX_GPIO_PORT                     GPIOA
#define UART4_TX_GPIO_CLK_ENABLE()             __HAL_RCC_GPIOA_CLK_ENABLE()
#define UART4_TX_GPIO_PIN                      GPIO_PIN_0
#define UART4_TX_GPIO_AF                       GPIO_AF8_UART4

#define UART4_RX_GPIO_PORT                     GPIOA
#define UART4_RX_GPIO_CLK_ENABLE()             __HAL_RCC_GPIOA_CLK_ENABLE()
#define UART4_RX_GPIO_PIN                      GPIO_PIN_1
#define UART4_RX_GPIO_AF                       GPIO_AF8_UART4

#define UART4_TX_DMA_CHANNEL                   DMA_CHANNEL_4
#define UART4_TX_DMA_STREAM                    DMA1_Stream4
#define UART4_DMA_TX_IRQn                      DMA1_Stream4_IRQn
#define UART4_DMA_TX_IRQHandler                DMA1_Stream4_IRQHandler
#define UART4_DMA_TX_IRQ_PRIORITY              0x0d
#define UART4_RX_DMA_CHANNEL                   DMA_CHANNEL_4
#define UART4_RX_DMA_STREAM                    DMA1_Stream2
#define UART4_DMA_RX_IRQn                      DMA1_Stream2_IRQn
#define UART4_DMA_RX_IRQHandler                DMA1_Stream2_IRQHandler
#define UART4_DMA_RX_IRQ_PRIORITY              0x0c
#define DEBUG_PORT                             UART4

#define MODULE_UART5                           UART5
#define UART5_CLOCK_ENABLE()                   __HAL_RCC_UART5_CLK_ENABLE()
#define UART5_FORCE_RESET()                    __HAL_RCC_UART5_FORCE_RESET()
#define UART5_RELEASE_RESET()                  __HAL_RCC_UART5_RELEASE_RESET()
#define UART5_DMA_CLK_ENABLE()                 __HAL_RCC_DMA5_CLK_ENABLE()
#define UART5_BAUDRATE                         115200
#if defined(STM32F405_BOOTLOADER)
#define UART5_IRQ_PRIORITY                     1
#else
#define UART5_IRQ_PRIORITY                     0x0b
#endif

#define UART5_TX_GPIO_PORT                     GPIOC
#define UART5_TX_GPIO_CLK_ENABLE()             __HAL_RCC_GPIOC_CLK_ENABLE()
#define UART5_TX_GPIO_PIN                      GPIO_PIN_12
#define UART5_TX_GPIO_AF                       GPIO_AF8_UART5

#define UART5_RX_GPIO_PORT                     GPIOD
#define UART5_RX_GPIO_CLK_ENABLE()             __HAL_RCC_GPIOD_CLK_ENABLE()
#define UART5_RX_GPIO_PIN                      GPIO_PIN_2
#define UART5_RX_GPIO_AF                       GPIO_AF8_UART5

#define UART5_TX_DMA_CHANNEL                   DMA_CHANNEL_5
#define UART5_TX_DMA_STREAM                    DMA1_Stream5
#define UART5_DMA_TX_IRQn                      DMA1_Stream5_IRQn
#define UART5_DMA_TX_IRQHandler                DMA1_Stream5_IRQHandler
#define UART5_DMA_TX_IRQ_PRIORITY              0x0d
#define UART5_RX_DMA_CHANNEL                   DMA_CHANNEL_5
#define UART5_RX_DMA_STREAM                    DMA1_Stream2
#define UART5_DMA_RX_IRQn                      DMA1_Stream2_IRQn
#define UART5_DMA_RX_IRQHandler                DMA1_Stream2_IRQHandler
#define UART5_DMA_RX_IRQ_PRIORITY              0x0c



//#define DEBUG_BAUDRATE                         4000000
//#define DEBUG_BAUDRATE                         256000
//#define DEBUG_BAUDRATE                         460800
#define DEBUG_BAUDRATE                         921600
//#define DEBUG_BAUDRATE                          1000000

#if 0
#define MODULE_USART6                           USART6
#define USART6_CLOCK_ENABLE()                   __HAL_RCC_USART6_CLK_ENABLE()
#define USART6_FORCE_RESET()                    __HAL_RCC_USART6_FORCE_RESET()
#define USART6_RELEASE_RESET()                  __HAL_RCC_USART6_RELEASE_RESET()
#define USART6_IRQn                             USART6_IRQn
#define USART6_IRQ_PRIORITY                     0x06
#define USART6_DEFAULT_BAUDRATE                 115200
//#define USART6_HIGH_BAUDRATE                    256000
//#define USART6_MAX_BAUDRATE                     1382400
#define USART6_MAX_BAUDRATE                     4000000
//#define USART6_MAX_BAUDRATE                   4608000

#define WIFI_UART_WORDLENGTH                    UART_WORDLENGTH_8B
#define WIFI_UART_STOPBITS                      UART_STOPBITS_1
#define WIFI_UART_PARITY                        UART_PARITY_NONE

#define USART6_TX_GPIO_CLK_ENABLE()             __HAL_RCC_GPIOC_CLK_ENABLE()
#define USART6_TX_GPIO_PIN                      GPIO_PIN_6
#define USART6_TX_GPIO_PORT                     GPIOC
#define USART6_TX_GPIO_AF                       GPIO_AF8_USART6

#define USART6_RX_GPIO_CLK_ENABLE()             __HAL_RCC_GPIOC_CLK_ENABLE()
#define USART6_RX_GPIO_PIN                      GPIO_PIN_7
#define USART6_RX_GPIO_PORT                     GPIOC
#define USART6_RX_GPIO_AF                       GPIO_AF8_USART6

#define USART6_DMA_CLK_ENABLE()                 __HAL_RCC_DMA2_CLK_ENABLE()
#define USART6_TX_DMA_CHANNEL                   DMA_CHANNEL_5
#define USART6_TX_DMA_STREAM                    DMA2_Stream6
#define USART6_DMA_TX_IRQn                      DMA2_Stream6_IRQn
#define USART6_DMA_TX_IRQHandler                DMA2_Stream6_IRQHandler
#define USART6_DMA_TX_IRQ_PRIORITY              0x07
#define USART6_RX_DMA_CHANNEL                   DMA_CHANNEL_5
#define USART6_RX_DMA_STREAM                    DMA2_Stream1
#define USART6_DMA_RX_IRQn                      DMA2_Stream1_IRQn
#define USART6_DMA_RX_IRQHandler                DMA2_Stream1_IRQHandler
#define USART6_DMA_RX_IRQ_PRIORITY              0x06
#else
#define MODULE_USART6                           UART4
#define USART6_CLOCK_ENABLE()                   __HAL_RCC_UART4_CLK_ENABLE()
#define USART6_FORCE_RESET()                    __HAL_RCC_UART4_FORCE_RESET()
#define USART6_RELEASE_RESET()                  __HAL_RCC_UART4_RELEASE_RESET()
#define USART6_IRQn                             UART4_IRQn
#define USART6_IRQ_PRIORITY                     0x06
#define USART6_DEFAULT_BAUDRATE                 115200
#define USART6_HIGH_BAUDRATE                    256000
#define USART6_MAX_BAUDRATE                     1382400
//#define USART6_MAX_BAUDRATE                   4608000

#define USART6_TX_GPIO_CLK_ENABLE()             __HAL_RCC_GPIOC_CLK_ENABLE()
#define USART6_TX_GPIO_PIN                      GPIO_PIN_10
#define USART6_TX_GPIO_PORT                     GPIOC
#define USART6_TX_GPIO_AF                       GPIO_AF8_UART4

#define USART6_RX_GPIO_CLK_ENABLE()             __HAL_RCC_GPIOC_CLK_ENABLE()
#define USART6_RX_GPIO_PIN                      GPIO_PIN_11
#define USART6_RX_GPIO_PORT                     GPIOC
#define USART6_RX_GPIO_AF                       GPIO_AF8_UART4

#define USART6_DMA_CLK_ENABLE()                 __HAL_RCC_DMA2_CLK_ENABLE()
#define USART6_TX_DMA_CHANNEL                   DMA_CHANNEL_5
#define USART6_TX_DMA_STREAM                    DMA2_Stream6
#define USART6_DMA_TX_IRQn                      DMA2_Stream6_IRQn
#define USART6_DMA_TX_IRQHandler                DMA2_Stream6_IRQHandler
#define USART6_DMA_TX_IRQ_PRIORITY              0x07
#define USART6_RX_DMA_CHANNEL                   DMA_CHANNEL_5
#define USART6_RX_DMA_STREAM                    DMA2_Stream1
#define USART6_DMA_RX_IRQn                      DMA2_Stream1_IRQn
#define USART6_DMA_RX_IRQHandler                DMA2_Stream1_IRQHandler
#define USART6_DMA_RX_IRQ_PRIORITY              0x06
#endif

#define WIFI_LOWEST_BAUDRATE                    115200
#define WIFI_HIGHEST_BAUDRATE                   4608000

#define WIFI_UART_WORDLENGTH                    UART_WORDLENGTH_8B
#define WIFI_UART_STOPBITS                      UART_STOPBITS_1
#define WIFI_UART_PARITY                        UART_PARITY_NONE

#define WIFI_CS_GPIO_PORT                       GPIOB
#define WIFI_CS_GPIO_CLK_ENABLE()               __HAL_RCC_GPIOB_CLK_ENABLE()
#define WIFI_CS_PIN                             GPIO_PIN_10
#define WIFI_CS_PIN_PULL                        GPIO_PULLDOWN

#define WIFI_RST_GPIO_PORT                      GPIOB
#define WIFI_RST_GPIO_CLK_ENABLE()              __HAL_RCC_GPIOB_CLK_ENABLE()
#define WIFI_RST_PIN                            GPIO_PIN_4
#define WIFI_RST_PIN_PULL                       GPIO_NOPULL

#define WIFI_ENABLE_GPIO_PORT                   GPIOA
#define WIFI_ENABLE_GPIO_CLK_ENABLE()           __HAL_RCC_GPIOA_CLK_ENABLE()
#define WIFI_ENABLE_PIN                         GPIO_PIN_15
#define WIFI_ENABLE_PIN_PULL                    GPIO_NOPULL

#endif

/*################################ ADC #######################################*/
#if defined(HAL_ADC_MODULE_ENABLED)
typedef enum{
    V5IN_CHANNEL = ADC_CHANNEL_14,
    VBAT_CHANNEL = ADC_CHANNEL_15,
}eAdcChannels;

#define BSP_ADCx                                ADC1
#define BSP_ADCx_CLK_ENABLE()                   __HAL_RCC_ADC1_CLK_ENABLE()
#define BSP_ADCx_CLK_DISABLE()                  __HAL_RCC_ADC1_CLK_DISABLE()
#define BSP_ADCx_FORCE_RESET()                  __HAL_RCC_ADC_FORCE_RESET()
#define BSP_ADCx_RELEASE_RESET()                __HAL_RCC_ADC_RELEASE_RESET()
#define BSP_ADCx_IRQn                           ADC_IRQn
#define BSP_ADCx_IRQ_HANDLER                    ADC_IRQHandler
#define BSP_ADCx_IRQ_PRIORITY                   2

#define BSP_ADCx_CHAN_PORT                      GPIOC
#define BSP_ADCx_CHAN_CLK_ENABLE()              __HAL_RCC_GPIOC_CLK_ENABLE()
#define BSP_ADCx_CHAN_CLK_DISABLE()             __HAL_RCC_GPIOC_CLK_DISABLE()
#define BSP_ADCx_VBAT_PIN                       GPIO_PIN_5
#define BSP_ADCx_V5IN_PIN                       GPIO_PIN_4

#define BSP_ADC_PEROID                          120

#endif


/*################################ I2C #######################################*/
#if defined(HAL_I2C_MODULE_ENABLED)
/* Definition for I2Cx clock resources */
#define BSP_I2Cx                                I2C2
#define BSP_I2Cx_CLK_ENABLE()                   __HAL_RCC_I2C2_CLK_ENABLE()
#define BSP_I2Cx_FORCE_RESET()                  __HAL_RCC_I2C2_FORCE_RESET()
#define BSP_I2Cx_RELEASE_RESET()                __HAL_RCC_I2C2_RELEASE_RESET()
#define BSP_I2Cx_SPEED                          400000
#define BSP_I2Cx_SLAVE_ADDRESS                  0xf0

#define BSP_I2Cx_SCL_GPIO_PORT                  GPIOB
#define BSP_I2Cx_SCL_GPIO_CLK_ENABLE()          __HAL_RCC_GPIOB_CLK_ENABLE()
#define BSP_I2Cx_SCL_PIN                        GPIO_PIN_10
#define BSP_I2Cx_SCL_AF                         GPIO_AF4_I2C2
#define BSP_I2Cx_SCL_PULL                       GPIO_NOPULL

#define BSP_I2Cx_SDA_GPIO_PORT                  GPIOB
#define BSP_I2Cx_SDA_GPIO_CLK_ENABLE()          __HAL_RCC_GPIOB_CLK_ENABLE()
#define BSP_I2Cx_SDA_PIN                        GPIO_PIN_11
#define BSP_I2Cx_SDA_AF                         GPIO_AF4_I2C2
#define BSP_I2Cx_SDA_PULL                       GPIO_NOPULL

#endif

#define BSP_EEROM_WRITE_PROTECT_PORT            GPIOB
#define BSP_EEROM_WRITE_PROTECT_CLK_ENABLE()    __HAL_RCC_GPIOB_CLK_ENABLE()
#define BSP_EEROM_WRITE_PROTECT_PIN             GPIO_PIN_0
#define BSP_EEROM_WRITE_PROTECT_PULL            GPIO_NOPULL
#define BSP_EEROM_WRITE_ENABLE()                HAL_GPIO_WritePin(BSP_EEROM_WRITE_PROTECT_PORT, BSP_EEROM_WRITE_PROTECT_PIN, GPIO_PIN_RESET)
#define BSP_EEROM_WRITE_FORBIDEN()              HAL_GPIO_WritePin(BSP_EEROM_WRITE_PROTECT_PORT, BSP_EEROM_WRITE_PROTECT_PIN, GPIO_PIN_SET)

#define BSP_RTC_INTERRUPT_PORT                  GPIOB
#define BSP_RTC_INTERRUPT_CLK_ENABLE()          __HAL_RCC_GPIOB_CLK_ENABLE()
#define BSP_RTC_INTERRUPT_PIN                   GPIO_PIN_1
#define BSP_RTC_INTERRUPT_PULL                  GPIO_NOPULL
#define BSP_RTC_INTERRUPT_IRQn                  EXTI1_IRQn
#define BSP_RTC_INTERRUPT_PRIORITY              0x05

/*Device Address*/
#define BSP_RTC_WR_ADDRESS                      0x64
#define BSP_RTC_RD_ADDRESS                      0x65

#define BSP_EEROM_WR_ADDRESS                    0xA0
#define BSP_EEROM_RD_ADDRESS                    0xA1

/******************************************************************************/

#ifdef __cplusplus
}
#endif

#endif /* __BSP_STM32F405ANC_H */